Shanghai, China

• Responsible for development, maintain and optimization of FPGA software engines, such as synthesis, P&R and bit-stream generation
• Work closely with hardware team to capture/model silicon design by software
• Interaction with physical design and validation team to implement timing and power data into FPGA tools

• B.S with 5+ years of experience or MS with 2+ years of experience in EDA or FPGA software development
• Electronic engineering education background, good knowledge of digital circuit
• Good at C/C++ programming
• Capable of scripts such as python or tcl etc.
• Prefer experiences of P&R algorithm or RTL synthesis